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Industry Deep Dives Topic: Semiconductors

Can China’s DRAM Makers Break the Global Memory Cycle?

China's CXMT is expanding DRAM capacity and developing HBM. Examine whether its yields, customer qualification and supply growth can reshape the memory cycle.

Chinese DRAM fabrication capacity expands toward advanced HBM production, while manufacturing yields and qualification constrain its effect on the global memory cycle.

China’s DRAM manufacturers can change the distribution of supply and pricing pressure within the global memory market. They are much less likely to eliminate the industry’s cyclical economics. ChangXin Memory Technologies (CXMT) now has meaningful scale in conventional DRAM, but the manufacturing and commercial requirements of advanced server memory and high-bandwidth memory (HBM) still separate announced capacity from internationally competitive output.

The distinction became sharper in October 2026. CXMT disclosed exceptionally strong third-quarter results while preparing further production expansion. At the same time, reporting on its planned HBM3E production described yields materially below those of established suppliers. China’s growing manufacturing base presents a credible challenge to some memory segments, yet the price-setting supply of advanced AI memory remains constrained by yield, packaging, customer approval and the capital allocation decisions of Samsung, SK hynix and Micron.

A disruption of a memory cycle means more than a stock-price reaction to a technical announcement. It would require Chinese production to alter global supply-demand balances repeatedly and at sufficient scale to change the timing, depth or profitability of industry upturns and downturns.

What CXMT’s latest earnings actually establish

On October 30, CXMT reported revenue of RMB118.71 billion for the quarter ended September 30, 2026, an increase of 613.2% from a year earlier and 19.3% from the preceding quarter. Net profit attributable to shareholders reached RMB54.4 billion. Its reported gross margin was 89.53%, up 1.94 percentage points sequentially.

For the first nine months of 2026, the company reported RMB269.02 billion in revenue and RMB132.04 billion in attributable net profit. It held RMB285.16 billion in cash at September 30. These results are reported company figures carried in Reuters’ October 30 coverage; they describe an extraordinary period of higher DRAM selling prices, rising shipments and manufacturing-scale gains. They do not demonstrate that the same margins are sustainable through a downturn.

The size of the business matters. Counterpoint Research estimated that CXMT held 10% of global DRAM revenue in the second quarter of 2026, making it the fourth-largest supplier on that measure. The Taiwanese research institute DSET had described a roughly 6% global market share in the first quarter of 2025, without establishing an identical revenue-share definition in its public summary. Those figures should not be treated as a clean, like-for-like time series.

CXMT’s rise has both commercial and policy origins. A DSET study traces its development to Hefei’s state-supported industrial model, early cooperation with GigaDevice, acquisition of Qimonda-related intellectual property and a broader effort to establish a domestic memory manufacturing ecosystem. The company’s growth therefore depends on more than one favorable price cycle: it also reflects persistent investment in manufacturing capabilities.

Still, the most striking implication of the October earnings is the direction of pricing. CXMT was earning record profits while global memory remained scarce. This is evidence that the Chinese supplier was participating in the same favorable industry cycle as its larger rivals, even as it was expanding capacity that could eventually place pressure on that cycle. The difference between a competitive announcement and a realized earnings impact also appeared in Sector Foundry’s analysis of the October AI stock selloff.

How a memory upcycle turns into an oversupply cycle

DRAM is a capital-intensive product with long construction, equipment installation and process-ramp lead times. Demand can change relatively quickly when cloud operators accelerate servers, smartphone makers revise forecasts or PC manufacturers adjust inventories. Manufacturing output responds more slowly, particularly at advanced process nodes.

When demand outruns output, prices rise. Higher margins encourage producers to add equipment, improve process density and expand factories. Once those investments generate sufficient additional good chips, the balance can reverse. Inventory accumulates, customers resist higher contract prices and producers cut utilization or spending. The cycle is a consequence of demand uncertainty interacting with delayed, large and relatively inflexible supply decisions.

China can influence that mechanism through a new source of supply. The relevant question is whether it adds enough economically usable bits in the products that determine marginal market prices. A factory announcement by itself cannot answer that question.

A practical supply calculation starts with wafer starts per month, then incorporates the number and size of dies per wafer, bits per die, manufacturing yield, utilization, product allocation and customer qualification. Additional wafer capacity can coexist with limited near-term competitive supply when a new process has low yield or a high proportion of its output is not accepted by the intended customers.

Reuters has reported that CXMT’s projects in Beijing, Shanghai and Hefei could eventually double its monthly manufacturing capacity to approximately 600,000 twelve-inch wafers. That is a potential future operating scale, not an observed volume of finished DRAM, and the figure should not be converted into global bit share without process- and product-specific inputs.

The distinction also works in reverse. A smaller competitor need not dominate worldwide output to affect prices. If it replaces imports within China’s large electronics market, established suppliers lose part of their addressable demand. They may then compete more aggressively for customers elsewhere, even if the Chinese producer exports relatively little. Domestic substitution is one possible route from local industrial policy to global pricing pressure.

The 4F² architecture is a manufacturing bet

October reports described CXMT’s plan to introduce a 4F² cell architecture in server-oriented DDR5 registered DIMMs (RDIMMs). Traditional 6F² and proposed 4F² labels refer to the nominal area of a DRAM cell expressed relative to the square of a characteristic feature dimension. In a simplified geometric comparison, reducing cell area from 6F² to 4F² suggests 50% more cells per unit of ideal array area.

That arithmetic describes a cell-layout opportunity. It does not establish 50% more sellable memory output per wafer. Peripheral circuits, redundancy, process integration, electrical performance, die layout, repair and manufacturing yield all affect the realized gain. A smaller nominal cell may also introduce additional steps, materials cost or defects that offset the density benefit.

One technical approach involves vertical-channel transistors, which could improve scaling without depending on exactly the same lithography path followed by incumbents. This matters to a Chinese manufacturer facing restrictions on access to some advanced manufacturing equipment. It also creates a new engineering risk: fabricating a promising cell and producing it repeatedly at high yield are different achievements.

Product timing adds another layer. An engineering demonstration or planned year-end launch is an earlier milestone than sustained mass production. Server DDR5 RDIMMs must also meet performance, reliability and platform-compatibility requirements across production batches. Buyers purchasing memory for expensive server fleets pay attention to lifetime failure rates and supply continuity as well as headline capacity and data rates.

Samsung and SK hynix are investigating advanced cell architectures and bonding approaches of their own, but their immediate incentives differ. They can continue using established production flows where yields are mature and move into new structures when the expected lifetime economics justify the change. A faster architectural announcement from CXMT therefore does not necessarily establish a manufacturing-cost lead.

CXMT said in its October earnings materials that samples developed using its sixth-generation DRAM manufacturing technology had completed validation. That is a meaningful development milestone. It should still be kept separate from public evidence of product-wide volume yield, server-platform qualification and recurring commercial shipments.

Why HBM remains a separate competitive race

HBM is built from DRAM, but competing in this market requires more than the ability to make conventional memory cells. Multiple known-good dies must be thinned, interconnected and assembled into closely integrated packages, then qualified for particular accelerator platforms. Through-silicon vias, stacking accuracy, thermal behavior, test coverage and advanced packaging yield determine how much finished memory can be shipped economically.

On October 28, Reuters reported, citing people familiar with CXMT’s work, that the company had supplied HBM3E samples to domestic AI-chip designers and planned limited production within two months. The same sources estimated usable yields at approximately 20%–30%, versus around 70% for SK hynix. They also suggested that the performance of the Chinese samples was closer to an earlier foreign HBM generation than to the cited HBM3E benchmark.

These are source-reported, not independently audited, yield comparisons. Product definitions, stages of manufacturing and test standards may differ. Their directional implication is nevertheless important: a substantial gap in good-package output can overwhelm a wafer-cost advantage.

For illustration, at the same input cost and with otherwise comparable products, a 20%–30% yield would require roughly 2.3–3.5 times as many production attempts as a 70% yield to produce one equivalent quantity of good output. This is arithmetic using the reported yields, not a forecast of CXMT’s actual cost ratio. Package complexity, input costs and performance could change the economics further.

The global competitive benchmark is also moving. SK hynix said in its October 28 third-quarter release that HBM4 should exceed HBM3E in both shipment volume and revenue during the fourth quarter of 2026. Samsung reported on October 29 that it had materially expanded HBM4 sales. Micron’s September fiscal-year results described continued high-value memory investment and qualifications in advanced server DRAM.

Even successful limited HBM3E production would initially address a different customer and capacity problem from a fully qualified supply position on leading global accelerator platforms. A domestic Chinese accelerator maker may rationally accept higher memory costs or reduced performance to secure an otherwise scarce component. That creates a viable local market before it establishes international cost leadership.

The memory and HBM supply-chain assessment identifies advanced stacking, testing and qualification as key reasons substitution has remained slow. Its discussion of US HBM export controls also clarifies why China has a strategic incentive to develop a domestic alternative, even at unfavorable initial manufacturing yields.

Product segmentation changes the pricing impact

A broad comparison of total DRAM capacity conceals distinct product markets. Conventional PC or mobile memory, server DDR5 and accelerator HBM all use DRAM technology, but they differ in process requirements, packaging, qualification, demand structure and pricing.

Segment Chinese competitive position, late 2026 Route to global price impact Main limiting factor
Consumer DDR and LPDDR Meaningful domestic manufacturing base; broad substitution opportunity Import replacement and new competitive supply Cost, yield, scale and customer acceptance
Server DDR5 RDIMM Technical roadmap advancing; further qualification required Substitution in Chinese data centers, then broader supplier competition Reliable high-volume production and platform certification
HBM3E Sample deliveries and reported limited-production plans Primarily relief of domestic accelerator bottlenecks at first Stacking yield, packaging economics and performance
HBM4 and leading-edge accelerator memory No established comparable volume position in the reviewed evidence Potential future competition after product and customer qualification Generation gap, integration and qualified scale

Read across the rows before comparing company market shares. A Chinese producer can gain conventional DRAM share and put pressure on legacy products while leading HBM suppliers retain strong customer positions. Both developments can occur within the same industry upcycle.

For 2026’s fourth quarter, TrendForce forecast further memory-price increases supported by cloud-service-provider orders and capacity shifting toward server DRAM and HBM. It also identified pressure on consumer electronics from the rising cost of memory. This mix explains why rising industry profitability has not automatically translated into equally strong demand in every end market.

Capacity reallocation is central. When the leading manufacturers shift production resources toward HBM or advanced server memory, they can tighten supply in consumer DRAM. A Chinese producer that expands standard DDR production may fill some of that gap. The incremental supply can moderate conventional-memory prices without removing scarcity in HBM.

The relevant pricing outcome could therefore be a widening divergence between memory categories, rather than the simultaneous collapse of the entire market. An aggregate DRAM statistic would obscure that result.

The incumbent response can absorb part of China’s expansion

The market is not passively waiting for Chinese fabs to reach full output. Samsung, SK hynix and Micron control where they deploy capacity, which products receive the newest process technology and how much output they commit under longer-duration customer agreements.

SK hynix disclosed on October 28 that it had secured long-term agreements covering more than 50% of its 2027–2028 production capacity. The company linked its favorable outlook to AI demand, extended factory lead times and the difficulty of supplying advanced products rapidly. Those agreements may reduce some exposure to short-term procurement volatility, although their pricing formulas and cancellation protections should not be assumed without contract-level disclosure. Similar contract-before-capacity behavior has emerged in AI-server components such as MLCCs and substrates, with important differences in product and financing economics.

Samsung reported that memory sales and operating profit set new quarterly records in the third quarter of 2026 as it emphasized AI applications and HBM4. Micron’s fiscal fourth-quarter release similarly described record results and multiple customer qualifications for advanced server-memory products. These disclosures indicate that the incumbents are allocating engineering and capital to segments where the number of immediately substitutable suppliers remains limited.

That positioning can preserve margins in the most specialized products even if the broader market becomes more competitive. It does not make the companies immune to cyclical demand reversals. An abrupt slowdown in AI spending, failed assumptions about application demand or excessive factory additions could still produce excess capacity and lower prices.

The counterargument is substantial. CXMT has accumulated capital, is pursuing several production sites and has demonstrated the ability to monetize a favorable DRAM cycle. Its prospective move into NAND could broaden its manufacturing and customer relationships. A sufficiently long period of state-supported investment might also allow Chinese producers to keep expanding through downturns when other companies reduce spending.

Such behavior could reduce the speed at which industry supply contracts during weak demand. That would not end cyclicality; it could make a future downcycle more prolonged in products where capacity remains available despite low returns.

For a global impact, however, capacity must emerge as repeatable good-bit output at prices that influence marginal supply decisions. Costly low-yield production sustained by policy objectives might alter local sourcing patterns long before it becomes a durable international price setter.

Export controls affect technology transfer more directly than chip shipments

China’s October 16, 2026, announcement from the Ministry of Commerce and Ministry of Science and Technology proposed revisions to its catalogue of technologies prohibited or restricted from export. The draft included memory-related design technology, bonding methods and other advanced semiconductor capabilities. An interim pre-export registration regime began with the announcement, while the proposed catalogue additions remained subject to public consultation.

The legal boundary matters. The Chinese government stated that, for most of the proposed technologies, products manufactured using the technology are outside the scope of the new technology-export controls. The measures should therefore not be described as a blanket ban on shipping Chinese DRAM chips overseas.

The more immediate implication is that overseas licensing, transfers of proprietary know-how and certain cross-border technology transactions could require additional review. Restricting intellectual-property transfer may help domestic firms retain technical capabilities, but it may also complicate international commercialization or manufacturing partnerships.

The government has outlined exemptions and automatic-license arrangements for some activities, including particular overseas chip-fabrication and collaborative research situations. ChinaTalk’s October 21 analysis examined the broad drafting of several proposed chip and memory categories, including vertical-channel DRAM technology. The final scope and enforcement practice remained unsettled as of November 1.

US restrictions on selected semiconductor equipment and advanced HBM exports create pressure in the opposite direction. Together, these policies may accelerate the creation of more distinct memory supply arrangements in China and overseas. That would complicate comparisons of one global capacity figure, but it would not prevent demand substitution or pricing changes from crossing borders.

Four disclosures would test the cycle thesis

The strongest evidence of a lasting change in memory economics would come from manufacturing and purchasing behavior, not a forecast of capacity or an architectural announcement.

1. CXMT’s realized bit output

Watch completed fab ramp schedules, utilization and externally supportable production volumes by process generation. A move toward the reported 600,000-wafer-per-month potential would become commercially consequential only when accompanied by improved yields and a disclosed product mix. The share of output sold as server-grade memory would matter more than a headline wafer count.

2. Repeat server and HBM customer qualification

Multiple production batches accepted by customers, repeat orders and third-party validation of performance would strengthen the case for durable entry. For HBM, the evidence would need to cover finished-stack yield and integration on domestic or international accelerator platforms, not merely DRAM die fabrication or the delivery of engineering samples.

3. Pricing divergence between conventional DRAM and HBM

If conventional DRAM contract prices weakened while advanced AI memory remained supply constrained, that would support a segment-level Chinese supply effect alongside continued HBM scarcity. A synchronized decline across both segments, by contrast, could indicate a broader demand shock or industry-wide excess investment. Attribution would still require shipment and inventory evidence.

4. The behavior of capacity through the next downturn

Whether Chinese manufacturers keep adding productive equipment during an industry contraction is a more revealing test than their output during a shortage. Persistent expansion when industry returns weaken would change how quickly excess supply clears, potentially increasing the length of the next downcycle in conventional DRAM.

The open question is whether China becomes a large, low-cost and consistently qualified supplier in the products that set global marginal prices. Without that evidence, its expansion is best understood as a powerful new source of competition within the memory cycle, with its greatest near-term influence in conventional DRAM and a more limited role in leading-edge HBM.

Sources & Methodology

Data as of November 1, 2026.

This analysis uses reported company results, current manufacturer disclosures, China’s official export-technology announcement and independent semiconductor research. Global DRAM revenue share, wafer capacity, process-density potential and HBM yield are different measures and are not treated as interchangeable indicators of good-bit output. The illustrative yield calculation holds production attempts and product definitions constant; the reported CXMT yield and factory expansion figures have not been independently audited, and customer-level qualification data remain incomplete.

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Background reading

  • Brokerage research from Daishin Securities (October 15, 2026) and Hana Securities (October 16 and 23, 2026), used for context only; no figures, text or charts reproduced.

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